IndexBus

    Use this section for the bounded shared-memory transport substrate: lane semantics, layouts, SHM delivery rules, execution patterns, and crate-level API entry points.

    Start With These Pages

    Overview
    What IndexBus provides as the transport base of the stack.
    Execution Patterns
    Router loops, sequencers, credits, and journal patterns.
    SHM Transport
    Host requirements, transport semantics, and shared-memory setup.
    Semantics
    Normative lane behavior and bounded-memory delivery rules.
    Layouts
    Region structure, lane headers, and ABI-oriented layout rules.
    Rustdoc Entry Points
    Curated crate-level API entry points for substrate, kit, and platform layers.

    Section Purpose

    Use this section when you need the transport-layer contract itself:

    • bounded shared-memory IPC semantics
    • lane layouts, capacities, ordering, and backpressure behavior
    • low-level crate surfaces used by higher ByteOr layers
    • Core Concepts for the shared platform model built on top of IndexBus
    • OSS for the execution layer that sits directly above the transport substrate
    Provenance
    Need the canonical source?
    Use the public hub to orient yourself, then jump to repo-owned docs or rustdoc when you need contract-level detail.
    Source-of-truth modelRepo docs index