indexbus_abi/layouts/
sequencer.rs

1use crate::{caps, IndexbusAtomicU32, IndexbusAtomicU64, LayoutHeader};
2
3/// A single consumer gating sequence, padded to a full cache line.
4///
5/// This matches the common low-latency practice of avoiding false sharing between
6/// independent consumer progress counters.
7#[repr(C, align(64))]
8pub struct SequencerGatingCell {
9    /// Consumer gating sequence (monotonic).
10    pub seq: IndexbusAtomicU64,
11    /// Padding to keep this counter in its own cache line.
12    pub pad_to_64: [u8; 56],
13}
14
15/// Sequencer region: Disruptor-style sequencer + gating sequences (control + counters).
16///
17/// This is a **new region layout** (v1 append-only) and must not reinterpret any existing region.
18///
19/// Notes:
20/// - The data/ring storage can be appended after the control block in future versions.
21/// - `LayoutHeader.layout_bytes` bounds all optional appended sections.
22#[repr(C, align(64))]
23pub struct SequencerLayout<const N: usize> {
24    /// Common region header (magic/version/capabilities/layout size).
25    pub header: LayoutHeader,
26
27    /// 0 = uninitialized, 1 = initializing, 2 = initialized
28    pub initialized: IndexbusAtomicU32,
29    /// Padding (reserved).
30    pub pad0: u32,
31
32    /// Pad to 64 so the first counter starts at offset 64.
33    pub pad_to_64: [u8; 40],
34
35    /// Producer cursor (monotonic sequence).
36    pub cursor: IndexbusAtomicU64,
37    /// Padding to keep the cursor in its own cache line.
38    pub pad_cursor: [u8; 56],
39
40    /// Per-consumer gating sequences.
41    pub gating: [SequencerGatingCell; N],
42}
43
44impl<const N: usize> SequencerLayout<N> {
45    /// Capabilities required for this region to be considered compatible.
46    pub const REQUIRED_CAPS: u32 = caps::INDEXBUS_CAP_SUPPORTS_SEQUENCER;
47}
48
49/// Concrete v1 sequencer layout for `N=4` (header generation target).
50#[repr(C, align(64))]
51pub struct SequencerLayout4 {
52    /// Common region header (magic/version/capabilities/layout size).
53    pub header: LayoutHeader,
54
55    /// 0 = uninitialized, 1 = initializing, 2 = initialized
56    pub initialized: IndexbusAtomicU32,
57    /// Padding (reserved).
58    pub pad0: u32,
59    /// Pad to 64 so the first counter starts at offset 64.
60    pub pad_to_64: [u8; 40],
61
62    /// Producer cursor (monotonic sequence).
63    pub cursor: IndexbusAtomicU64,
64    /// Padding to keep the cursor in its own cache line.
65    pub pad_cursor: [u8; 56],
66
67    /// Per-consumer gating sequences.
68    pub gating: [SequencerGatingCell; crate::INDEXBUS_SEQUENCER_CONSUMERS_DEFAULT],
69}
70
71impl SequencerLayout4 {
72    /// Capabilities required for this region to be considered compatible.
73    pub const REQUIRED_CAPS: u32 = caps::INDEXBUS_CAP_SUPPORTS_SEQUENCER;
74}