#ifndef INDEXBUS_V1_H
#define INDEXBUS_V1_H

#pragma once

#include <stdint.h>
#include <stddef.h>
/* Alignment helper for #[repr(align(N))] Rust types. */
#if defined(_MSC_VER) && !defined(__clang__)
  #define INDEXBUS_ALIGNED(n) __declspec(align(n))
#elif defined(__cplusplus) && (defined(__GNUC__) || defined(__clang__))
  #define INDEXBUS_ALIGNED(n) __attribute__((aligned(n)))
#elif defined(__cplusplus)
  #define INDEXBUS_ALIGNED(n) alignas(n)
#else
  #define INDEXBUS_ALIGNED(n) __attribute__((aligned(n)))
#endif

/* ABI atomics are represented as C integers in the v1 header. */
/* NOTE: Despite the name, these are storage-only (not C11 `_Atomic`). */
typedef uint32_t IndexbusAtomicU32;
typedef uint64_t IndexbusAtomicU64;

#ifdef __cplusplus
extern "C" {
#endif


/**
 * v1 constants (must match generated C headers).
 * Fixed bytes available per slot payload.
 */
#define INDEXBUS_SLOT_DATA_SIZE 256

/**
 * Number of slots in the shared pool.
 */
#define INDEXBUS_SLOTS_CAPACITY 1024

/**
 * Ring queue capacity (MUST be power-of-two).
 */
#define INDEXBUS_QUEUE_CAPACITY 1024

/**
 * Default fanout consumer count used by examples.
 */
#define INDEXBUS_FANOUT_CONSUMERS_DEFAULT 4

/**
 * Default sequencer consumer count used by concrete v1 layouts.
 */
#define INDEXBUS_SEQUENCER_CONSUMERS_DEFAULT 4

/**
 * Concrete v1 journal configuration (kept explicit to stabilize headers/tests).
 */
#define INDEXBUS_JOURNAL_SUBSCRIBERS_DEFAULT 4

/**
 * Number of segments in the concrete v1 journal layout.
 */
#define INDEXBUS_JOURNAL_SEGMENTS 3

/**
 * Bytes per segment in the concrete v1 journal layout.
 */
#define INDEXBUS_JOURNAL_SEGMENT_BYTES (64 * 1024)

/**
 * Free-list empty sentinel.
 */
#define INDEXBUS_EMPTY_FREE_U32 UINT32_C(0xFFFFFFFF)

/**
 * Magic used to identify IndexBus-mapped regions.
 *
 * Encodes the ASCII bytes `IBUS`.
 */
#define INDEXBUS_MAGIC_IBUS UINT32_C(0x53554249)

/**
 * ABI version number for IndexBus v1.
 */
#define INDEXBUS_ABI_VERSION_1 1

/**
 * Region supports the shared events queues (SPSC + MPSC).
 */
#define INDEXBUS_CAP_SUPPORTS_EVENTS (1u << 0)

/**
 * Region supports the state stream layout.
 */
#define INDEXBUS_CAP_SUPPORTS_STATE (1u << 1)

/**
 * Region supports fanout queues.
 */
#define INDEXBUS_CAP_SUPPORTS_FANOUT (1u << 2)

/**
 * Region has an appended wake section suitable for OS blocking.
 */
#define INDEXBUS_CAP_SUPPORTS_BLOCKING (1u << 3)

/**
 * Sequencer region: sequencer + gating sequences (new region type).
 */
#define INDEXBUS_CAP_SUPPORTS_SEQUENCER (1u << 4)

/**
 * Journal region: replayable append-only journal (new region type).
 */
#define INDEXBUS_CAP_SUPPORTS_JOURNAL (1u << 5)

/**
 * Optional appended stats/counters section for journal regions.
 */
#define INDEXBUS_CAP_SUPPORTS_JOURNAL_STATS (1u << 6)

/**
 * Mask for the low 8 bits containing the region kind discriminator.
 */
#define INDEXBUS_FLAGS_REGION_KIND_MASK UINT16_C(0x00FF)

/**
 * `LayoutHeader.flags` kind value: shared events region (`layouts::SharedLayout`).
 */
#define INDEXBUS_REGION_KIND_EVENTS 1

/**
 * `LayoutHeader.flags` kind value: fanout events region (`layouts::SharedFanoutLayout4`).
 */
#define INDEXBUS_REGION_KIND_FANOUT 2

/**
 * `LayoutHeader.flags` kind value: state region (`layouts::StateLayout256`).
 */
#define INDEXBUS_REGION_KIND_STATE 3

/**
 * `LayoutHeader.flags` kind value: sequencer region (`layouts::SequencerLayout4`).
 */
#define INDEXBUS_REGION_KIND_SEQUENCER 4

/**
 * `LayoutHeader.flags` kind value: journal region (`layouts::JournalLayout4`).
 */
#define INDEXBUS_REGION_KIND_JOURNAL 5

/**
 * Shared-memory layout header for ABI/version checks.
 *
 * Keep this at the start of any region you expect to map across processes (and potentially
 * across versions).
 */
typedef struct {
  /**
   * Magic value identifying an IndexBus-mapped region.
   */
  uint32_t magic;
  /**
   * ABI version number.
   */
  uint16_t version;
  /**
   * Layout flags (reserved for future use).
   */
  uint16_t flags;
  /**
   * Capability bitset indicating which optional features/sections are present.
   */
  uint32_t capabilities;
  /**
   * v1: total size in bytes of the shared layout that starts with this header.
   *
   * Initializers should set this to the full byte length of the mapped layout they created.
   * Consumers should validate that their mapping is at least this length before accessing
   * appended sections.
   */
  uint32_t layout_bytes;
} LayoutHeader;

/**
 * WakeCell is a 64-byte, 64-aligned monotonic counter.
 *
 * It is appended to layouts when `INDEXBUS_CAP_SUPPORTS_BLOCKING` is set.
 */
typedef struct {
  /**
   * Monotonic sequence value used for wait/wake.
   */
  IndexbusAtomicU32 seq;
  /**
   * Padding (reserved).
   */
  uint32_t pad0;
  /**
   * Padding to 64 bytes.
   */
  uint8_t pad_to_64[56];
} INDEXBUS_ALIGNED(64) WakeCell;

/**
 * Optional appended wake section for `SharedLayout`.
 */
typedef struct {
  /**
   * Wake cell for the SPSC queue.
   */
  WakeCell spsc_wake;
  /**
   * Wake cell for the MPSC queue.
   */
  WakeCell mpsc_wake;
} INDEXBUS_ALIGNED(64) SharedWakeSection;

/**
 * Optional appended wake section for a state region.
 */
typedef struct {
  /**
   * Wake cell for state updates.
   */
  WakeCell state_wake;
} INDEXBUS_ALIGNED(64) StateWakeSection;

/**
 * Concrete v1 fanout wake section for `N=4`.
 */
typedef struct {
  /**
   * Wake cell for the producer cursor.
   */
  WakeCell producer_wake;
  /**
   * Per-consumer wake cells.
   */
  WakeCell consumer_wake[4];
} INDEXBUS_ALIGNED(64) FanoutWakeSection4;

/**
 * Concrete v1 sequencer wake section for `N=4`.
 */
typedef struct {
  /**
   * Wake cell for the producer cursor.
   */
  WakeCell producer_wake;
  /**
   * Per-consumer wake cells.
   */
  WakeCell consumer_wake[4];
} INDEXBUS_ALIGNED(64) SequencerWakeSection4;

/**
 * Optional appended wake section for a journal region.
 *
 * (Concrete v1 shape: 1 publisher + 4 subscribers.)
 */
typedef struct {
  /**
   * Wake cell for the publisher.
   */
  WakeCell publisher_wake;
  /**
   * Per-subscriber wake cells.
   */
  WakeCell subscriber_wake[4];
} INDEXBUS_ALIGNED(64) JournalWakeSection4;

/**
 * Journal segment metadata for one journal segment.
 *
 * Kept 64B-aligned so per-segment metadata can be read without false sharing.
 */
typedef struct {
  /**
   * Segment identifier (implementation-defined).
   */
  IndexbusAtomicU32 segment_id;
  /**
   * Segment length in bytes.
   */
  IndexbusAtomicU32 segment_len;
  /**
   * Tail cursor within the segment.
   */
  IndexbusAtomicU64 tail;
  /**
   * Padding to keep segment metadata in a cache line.
   */
  uint8_t pad_to_64[48];
} INDEXBUS_ALIGNED(64) SegmentMeta;

/**
 * Fixed-size message slot.
 *
 * Slots are reference-counted and stored in shared memory; queues hold slot indices.
 */
typedef struct {
  /**
   * Next slot in the free list (slot index), or [`crate::INDEXBUS_EMPTY_FREE_U32`].
   */
  IndexbusAtomicU32 next_free;
  /**
   * Reference count for shared ownership across queues/consumers.
   */
  IndexbusAtomicU32 refcnt;
  /**
   * Payload length in bytes.
   */
  uint32_t len;
  /**
   * Padding (reserved).
   */
  uint32_t pad;
  /**
   * Payload storage.
   */
  uint8_t data[INDEXBUS_SLOT_DATA_SIZE];
} Slot;

/**
 * Pool of fixed-size slots used by shared-memory queues.
 */
typedef struct {
  /**
   * Head of the free list (slot index), or [`crate::INDEXBUS_EMPTY_FREE_U32`].
   */
  IndexbusAtomicU32 free_head;
  /**
   * Fixed-capacity slot storage.
   */
  Slot slots[INDEXBUS_SLOTS_CAPACITY];
} INDEXBUS_ALIGNED(64) SlotPoolLayout;

/**
 * Single-producer/single-consumer index queue.
 */
typedef struct {
  /**
   * Producer cursor.
   */
  IndexbusAtomicU64 head;
  /**
   * Consumer cursor.
   */
  IndexbusAtomicU64 tail;
  /**
   * Ring buffer of slot indices.
   */
  uint32_t buf[INDEXBUS_QUEUE_CAPACITY];
} INDEXBUS_ALIGNED(64) IndexQueue;

/**
 * Multi-producer/single-consumer queue using per-slot sequence numbers.
 */
typedef struct {
  /**
   * Producer reservation cursor.
   */
  IndexbusAtomicU64 write;
  /**
   * Padding to keep counters in separate cache lines.
   */
  uint8_t pad0[56];
  /**
   * Consumer cursor (single consumer).
   */
  IndexbusAtomicU64 read;
  /**
   * Padding to keep counters in separate cache lines.
   */
  uint8_t pad1[56];
  /**
   * Per-slot sequence numbers.
   */
  IndexbusAtomicU64 seq[INDEXBUS_QUEUE_CAPACITY];
  /**
   * Per-slot stored values (slot indices).
   */
  uint32_t buf[INDEXBUS_QUEUE_CAPACITY];
} INDEXBUS_ALIGNED(64) MpscQueue;

/**
 * Shared events region (SPSC + MPSC) base layout.
 */
typedef struct {
  /**
   * Common region header (magic/version/capabilities/layout size).
   */
  LayoutHeader header;
  /**
   * 0 = uninitialized, 1 = initializing, 2 = initialized
   */
  IndexbusAtomicU32 initialized;
  /**
   * Padding (reserved).
   */
  uint32_t pad0;
  /**
   * Pad to 64 so `SlotPoolLayout` (align 64) starts at offset 64.
   */
  uint8_t pad_to_64[40];
  /**
   * Slot pool backing both the SPSC and MPSC queues.
   */
  SlotPoolLayout slot_pool;
  /**
   * SPSC queue of slot indices.
   */
  IndexQueue queue;
  /**
   * MPSC queue of slot indices.
   */
  MpscQueue mpsc_queue;
} INDEXBUS_ALIGNED(64) SharedLayout;


/**
 * Concrete v1 fanout layout for `N=4` (header generation target).
 */
typedef struct {
  /**
   * Common region header (magic/version/capabilities/layout size).
   */
  LayoutHeader header;
  /**
   * 0 = uninitialized, 1 = initializing, 2 = initialized
   */
  IndexbusAtomicU32 initialized;
  /**
   * Padding (reserved).
   */
  uint32_t pad0;
  /**
   * Pad to 64 so `SlotPoolLayout` (align 64) starts at offset 64.
   */
  uint8_t pad_to_64[40];
  /**
   * Slot pool backing all queues.
   */
  SlotPoolLayout slot_pool;
  /**
   * SPSC producer queue of slot indices.
   */
  IndexQueue producer_queue;
  /**
   * MPSC producer queue of slot indices.
   */
  MpscQueue producer_queue_mpsc;
  /**
   * Router round-robin cursor used by work-queue routing.
   */
  IndexbusAtomicU32 router_rr;
  /**
   * Padding (reserved).
   */
  uint32_t pad_router_rr;
  /**
   * Per-consumer SPSC queues.
   */
  IndexQueue consumer_queues[4];
} INDEXBUS_ALIGNED(64) SharedFanoutLayout4;

/**
 * A single consumer gating sequence, padded to a full cache line.
 *
 * This matches the common low-latency practice of avoiding false sharing between
 * independent consumer progress counters.
 */
typedef struct {
  /**
   * Consumer gating sequence (monotonic).
   */
  IndexbusAtomicU64 seq;
  /**
   * Padding to keep this counter in its own cache line.
   */
  uint8_t pad_to_64[56];
} INDEXBUS_ALIGNED(64) SequencerGatingCell;

/**
 * Concrete v1 sequencer layout for `N=4` (header generation target).
 */
typedef struct {
  /**
   * Common region header (magic/version/capabilities/layout size).
   */
  LayoutHeader header;
  /**
   * 0 = uninitialized, 1 = initializing, 2 = initialized
   */
  IndexbusAtomicU32 initialized;
  /**
   * Padding (reserved).
   */
  uint32_t pad0;
  /**
   * Pad to 64 so the first counter starts at offset 64.
   */
  uint8_t pad_to_64[40];
  /**
   * Producer cursor (monotonic sequence).
   */
  IndexbusAtomicU64 cursor;
  /**
   * Padding to keep the cursor in its own cache line.
   */
  uint8_t pad_cursor[56];
  /**
   * Per-consumer gating sequences.
   */
  SequencerGatingCell gating[INDEXBUS_SEQUENCER_CONSUMERS_DEFAULT];
} INDEXBUS_ALIGNED(64) SequencerLayout4;


/**
 * Concrete v1 state layout for `STATE_MAX=256` (header generation target).
 */
typedef struct {
  /**
   * Common region header (magic/version/capabilities/layout size).
   */
  LayoutHeader header;
  /**
   * State sequence protocol.
   */
  IndexbusAtomicU64 seq;
  /**
   * Current payload length in bytes.
   */
  IndexbusAtomicU32 len;
  /**
   * Padding (reserved).
   */
  IndexbusAtomicU32 pad;
  /**
   * State payload bytes (up to `len`).
   */
  uint8_t data[256];
  /**
   * 16 + 8 + 4 + 4 + 256 = 288; pad 32 bytes so appended wake starts 64-aligned.
   */
  uint8_t pad_to_64[32];
} INDEXBUS_ALIGNED(64) StateLayout256;

/**
 * Concrete v1 journal layout:
 * - 3 segments
 * - 64KiB per segment
 * - 4 subscriber positions
 *
 * This is a **new region layout** (v1 append-only) and must not reinterpret any existing region.
 */
typedef struct {
  /**
   * Common region header (magic/version/capabilities/layout size).
   */
  LayoutHeader header;
  /**
   * 0 = uninitialized, 1 = initializing, 2 = initialized
   */
  IndexbusAtomicU32 initialized;
  /**
   * Padding (reserved).
   */
  uint32_t pad0;
  /**
   * Pad to 64 so the first counter starts at offset 64.
   */
  uint8_t pad_to_64[40];
  /**
   * Global publication position (monotonic bytes/records position; interpretation is lane-specific).
   */
  IndexbusAtomicU64 pub_pos;
  /**
   * Padding to keep `pub_pos` in its own cache line.
   */
  uint8_t pad_pub_pos[56];
  /**
   * Current active segment index (0..3).
   */
  IndexbusAtomicU32 active_segment;
  /**
   * Padding to keep `active_segment` in its own cache line.
   */
  uint8_t pad_active_segment[60];
  /**
   * Per-segment metadata.
   */
  SegmentMeta segments[INDEXBUS_JOURNAL_SEGMENTS];
  /**
   * Per-subscriber positions.
   */
  IndexbusAtomicU64 sub_pos[INDEXBUS_JOURNAL_SUBSCRIBERS_DEFAULT];
  /**
   * Pad so `segment_bufs` starts 64B-aligned.
   */
  uint8_t pad_after_sub_pos[32];
  /**
   * Segment buffers (64KiB each).
   */
  uint8_t segment_bufs[INDEXBUS_JOURNAL_SEGMENTS][INDEXBUS_JOURNAL_SEGMENT_BYTES];
} INDEXBUS_ALIGNED(64) JournalLayout4;


/**
 * Optional appended stats/counters section for a journal region.
 *
 * v1 policy: this section is append-only and only present when
 * `caps::INDEXBUS_CAP_SUPPORTS_JOURNAL_STATS` is set and `LayoutHeader.layout_bytes` covers it.
 */
typedef struct {
  /**
   * Total payload bytes committed by the publisher.
   */
  IndexbusAtomicU64 pub_payload_bytes;
  /**
   * Total committed records (non-PAD).
   */
  IndexbusAtomicU64 pub_records;
  /**
   * Total committed PAD records.
   */
  IndexbusAtomicU64 pad_records;
  /**
   * Total segment rotations performed.
   */
  IndexbusAtomicU64 rotations;
  /**
   * Publisher hit configured boundedness (would overrun).
   */
  IndexbusAtomicU64 pub_would_overrun;
  /**
   * Publisher forced subscribers forward (catch-up policy).
   */
  IndexbusAtomicU64 pub_forced_catchup;
  /**
   * Subscriber-detected overruns (best-effort).
   */
  IndexbusAtomicU64 sub_overruns[INDEXBUS_JOURNAL_SUBSCRIBERS_DEFAULT];
  /**
   * Padding to 128 bytes (reserved for future appended stats).
   */
  uint8_t pad_to_128[48];
} INDEXBUS_ALIGNED(64) JournalStatsSection4;


#ifdef __cplusplus
} /* extern "C" */
#endif

/* ---- ABI sanity checks (generated) ---- */

#if defined(__cplusplus) && (__cplusplus >= 201103L)
    static_assert(INDEXBUS_QUEUE_CAPACITY != 0 && ((INDEXBUS_QUEUE_CAPACITY & (INDEXBUS_QUEUE_CAPACITY - 1)) == 0), "INDEXBUS_QUEUE_CAPACITY must be power-of-two");
    static_assert(INDEXBUS_ABI_VERSION_1 == 1, "ABI version mismatch");
    static_assert(sizeof(LayoutHeader) == 16, "LayoutHeader size mismatch");
    static_assert(sizeof(IndexbusAtomicU32) == 4, "IndexbusAtomicU32 size mismatch");
    static_assert(alignof(IndexbusAtomicU32) == 4, "IndexbusAtomicU32 align mismatch");
    static_assert(sizeof(IndexbusAtomicU64) == 8, "IndexbusAtomicU64 size mismatch");
    static_assert(alignof(IndexbusAtomicU64) == 8, "IndexbusAtomicU64 align mismatch");
    static_assert(sizeof(WakeCell) == 64, "WakeCell size mismatch");
    static_assert(alignof(WakeCell) == 64, "WakeCell align mismatch");
    static_assert(sizeof(SequencerGatingCell) == 64, "SequencerGatingCell size mismatch");
    static_assert(alignof(SequencerGatingCell) == 64, "SequencerGatingCell align mismatch");
    static_assert(alignof(SegmentMeta) == 64, "SegmentMeta align mismatch");
    static_assert(sizeof(SharedWakeSection) == 128, "SharedWakeSection size mismatch");
    static_assert(alignof(SharedWakeSection) == 64, "SharedWakeSection align mismatch");
    static_assert(sizeof(StateWakeSection) == 64, "StateWakeSection size mismatch");
    static_assert(alignof(StateWakeSection) == 64, "StateWakeSection align mismatch");
    static_assert(sizeof(FanoutWakeSection4) == (64 * (1 + 4)), "FanoutWakeSection4 size mismatch");
    static_assert(alignof(FanoutWakeSection4) == 64, "FanoutWakeSection4 align mismatch");
    static_assert(sizeof(SequencerWakeSection4) == (64 * (1 + INDEXBUS_SEQUENCER_CONSUMERS_DEFAULT)), "SequencerWakeSection4 size mismatch");
    static_assert(alignof(SequencerWakeSection4) == 64, "SequencerWakeSection4 align mismatch");

    static_assert(sizeof(Slot) == (4 + 4 + 4 + 4 + INDEXBUS_SLOT_DATA_SIZE), "Slot size mismatch");
    static_assert(sizeof(IndexQueue) == 64 + (4 * INDEXBUS_QUEUE_CAPACITY), "IndexQueue size mismatch");
    static_assert(alignof(IndexQueue) == 64, "IndexQueue align mismatch");
    static_assert(alignof(MpscQueue) == 64, "MpscQueue align mismatch");
    static_assert(alignof(SlotPoolLayout) == 64, "SlotPoolLayout align mismatch");

    static_assert(alignof(SharedLayout) == 64, "SharedLayout align mismatch");
    static_assert(alignof(SharedFanoutLayout4) == 64, "SharedFanoutLayout4 align mismatch");
    static_assert(alignof(SequencerLayout4) == 64, "SequencerLayout4 align mismatch");
    static_assert(alignof(StateLayout256) == 64, "StateLayout256 align mismatch");
    static_assert(alignof(JournalLayout4) == 64, "JournalLayout4 align mismatch");
    static_assert(alignof(JournalStatsSection4) == 64, "JournalStatsSection4 align mismatch");
    static_assert(sizeof(JournalStatsSection4) == 128, "JournalStatsSection4 size mismatch");

    static_assert(offsetof(SharedLayout, slot_pool) == 64, "SharedLayout.slot_pool offset mismatch");
    static_assert(offsetof(SharedFanoutLayout4, slot_pool) == 64, "SharedFanoutLayout4.slot_pool offset mismatch");
    static_assert(offsetof(SequencerLayout4, cursor) == 64, "SequencerLayout4.cursor offset mismatch");
    static_assert(offsetof(SequencerLayout4, gating) == 128, "SequencerLayout4.gating offset mismatch");
    static_assert(offsetof(JournalLayout4, pub_pos) == 64, "JournalLayout4.pub_pos offset mismatch");
    static_assert(offsetof(JournalLayout4, segments) == 192, "JournalLayout4.segments offset mismatch");
    static_assert(offsetof(JournalLayout4, segment_bufs) == 448, "JournalLayout4.segment_bufs offset mismatch");

    static_assert(sizeof(StateLayout256) % 64 == 0, "StateLayout256 must be 64B-multiple for wake append");
#elif defined(__STDC_VERSION__) && (__STDC_VERSION__ >= 201112L)
    _Static_assert(INDEXBUS_QUEUE_CAPACITY != 0 && ((INDEXBUS_QUEUE_CAPACITY & (INDEXBUS_QUEUE_CAPACITY - 1)) == 0), "INDEXBUS_QUEUE_CAPACITY must be power-of-two");
    _Static_assert(INDEXBUS_ABI_VERSION_1 == 1, "ABI version mismatch");
    _Static_assert(sizeof(LayoutHeader) == 16, "LayoutHeader size mismatch");
    _Static_assert(sizeof(IndexbusAtomicU32) == 4, "IndexbusAtomicU32 size mismatch");
    _Static_assert(_Alignof(IndexbusAtomicU32) == 4, "IndexbusAtomicU32 align mismatch");
    _Static_assert(sizeof(IndexbusAtomicU64) == 8, "IndexbusAtomicU64 size mismatch");
    _Static_assert(_Alignof(IndexbusAtomicU64) == 8, "IndexbusAtomicU64 align mismatch");
    _Static_assert(sizeof(WakeCell) == 64, "WakeCell size mismatch");
    _Static_assert(_Alignof(WakeCell) == 64, "WakeCell align mismatch");
    _Static_assert(sizeof(SequencerGatingCell) == 64, "SequencerGatingCell size mismatch");
    _Static_assert(_Alignof(SequencerGatingCell) == 64, "SequencerGatingCell align mismatch");
    _Static_assert(_Alignof(SegmentMeta) == 64, "SegmentMeta align mismatch");
    _Static_assert(sizeof(SharedWakeSection) == 128, "SharedWakeSection size mismatch");
    _Static_assert(_Alignof(SharedWakeSection) == 64, "SharedWakeSection align mismatch");
    _Static_assert(sizeof(StateWakeSection) == 64, "StateWakeSection size mismatch");
    _Static_assert(_Alignof(StateWakeSection) == 64, "StateWakeSection align mismatch");
    _Static_assert(sizeof(FanoutWakeSection4) == (64 * (1 + 4)), "FanoutWakeSection4 size mismatch");
    _Static_assert(_Alignof(FanoutWakeSection4) == 64, "FanoutWakeSection4 align mismatch");
    _Static_assert(sizeof(SequencerWakeSection4) == (64 * (1 + INDEXBUS_SEQUENCER_CONSUMERS_DEFAULT)), "SequencerWakeSection4 size mismatch");
    _Static_assert(_Alignof(SequencerWakeSection4) == 64, "SequencerWakeSection4 align mismatch");

    _Static_assert(sizeof(Slot) == (4 + 4 + 4 + 4 + INDEXBUS_SLOT_DATA_SIZE), "Slot size mismatch");
    _Static_assert(sizeof(IndexQueue) == 64 + (4 * INDEXBUS_QUEUE_CAPACITY), "IndexQueue size mismatch");
    _Static_assert(_Alignof(IndexQueue) == 64, "IndexQueue align mismatch");
    _Static_assert(_Alignof(MpscQueue) == 64, "MpscQueue align mismatch");
    _Static_assert(_Alignof(SlotPoolLayout) == 64, "SlotPoolLayout align mismatch");

    _Static_assert(_Alignof(SharedLayout) == 64, "SharedLayout align mismatch");
    _Static_assert(_Alignof(SharedFanoutLayout4) == 64, "SharedFanoutLayout4 align mismatch");
    _Static_assert(_Alignof(SequencerLayout4) == 64, "SequencerLayout4 align mismatch");
    _Static_assert(_Alignof(StateLayout256) == 64, "StateLayout256 align mismatch");

    _Static_assert(_Alignof(JournalLayout4) == 64, "JournalLayout4 align mismatch");
    _Static_assert(_Alignof(JournalStatsSection4) == 64, "JournalStatsSection4 align mismatch");
    _Static_assert(sizeof(JournalStatsSection4) == 128, "JournalStatsSection4 size mismatch");

    _Static_assert(offsetof(SharedLayout, slot_pool) == 64, "SharedLayout.slot_pool offset mismatch");
    _Static_assert(offsetof(SharedFanoutLayout4, slot_pool) == 64, "SharedFanoutLayout4.slot_pool offset mismatch");
    _Static_assert(offsetof(SequencerLayout4, cursor) == 64, "SequencerLayout4.cursor offset mismatch");
    _Static_assert(offsetof(SequencerLayout4, gating) == 128, "SequencerLayout4.gating offset mismatch");
    _Static_assert(offsetof(JournalLayout4, pub_pos) == 64, "JournalLayout4.pub_pos offset mismatch");
    _Static_assert(offsetof(JournalLayout4, segments) == 192, "JournalLayout4.segments offset mismatch");
    _Static_assert(offsetof(JournalLayout4, segment_bufs) == 448, "JournalLayout4.segment_bufs offset mismatch");

    _Static_assert(sizeof(StateLayout256) % 64 == 0, "StateLayout256 must be 64B-multiple for wake append");
#endif

#endif  /* INDEXBUS_V1_H */